1. Field of the Invention
This invention pertains to a process switch control apparatus and a process control method for use in a multi-process system in which a plurality of processes operate time divisionally, or segments of time.
2. Description of the Related Art
The operation of a computer system is required to be expedited more than ever before. Such a computer system generally runs a plurality of processes. Also, a system has been realized for improving computing performance by connecting a plurality of mutually communicable computers. Message communications for use in such a system require as small a time overhead as possible for not sacrificing computing performance. Similarly, a data input/output (I/O) process of such a system requires as small a time overhead as possible. Here, a process is defined as an execution unit of a computer system running under an execution right granted by a CPU. Such an execution unit includes what is called a task.
Conventionally, when a computer system runs a plurality of processes, it has been necessary to have an operating system (hereafter referred to as OS) intervene in a series of input/output processes. However, an OS intervention greatly protracts computer processing time, e.g. for processing the shift of control from a user process to the OS. To reduce an OS overhead, new arts have been devised such as the ones disclosed in the Japanese Patent Application Official Circular 1991-150659 (a data transfer system) and the Japanese Patent Application Official Circular 1993-233440 (a data transfer system having a buffer function), which describe a transfer system at user level without an OS intervention. Yet, even these arts are applicable only to a case in which a computer has only one process for transmitting a message, thereby rendering their applications to a multi-process environment difficult.
Conventionally, when an attempt is made to enable a message communication or an input/output process at user level without an OS intervention, a multi-process environment has a problem of losing consistency of the message communication or input/output process as a single operation (e.g. a message communication), when it is split into a plurality of transactions, inasmuch as operations of other processes intervene because of process switching between the transactions.
FIG. 1A and FIG. 1B are explanatory diagrams illustrating a purpose of this invention. In the following description, a word "switch" is used in a sense meaning "an execution of switching". For instance, an expression "a process switch" is defined as meaning "switching a process".
FIG. 1A illustrates a generic process switch. When a task A is running, a generation of an interruption invoking a process switch causes the OS to allocate a CPU time to a task B, thereby starting the run of task B.
FIG. 1B illustrates the execution of task A in a period between the start and end of a message communication or an input/output process. Upon generating an interruption invoking a process switch, before task A starts a message communication or an input/output process, shown as timing (TASK SWITCH) (1), even if the process switch switches a CPU execution right to task B, no problem arises. On the other hand, upon generating an interruption invoking a process switch in a period of a critical section, shown as timing (TASK SWITCH) (2), in which a task A is performing a message communication or an input/output process at a user level without an OS intervention, a problem arises.
That is, because task A is performing a message communication or an input/output process at a user level when task B starts running with a CPU time having been allocated by a process switch in the above period, there are cases in which a message communication or an input/output process is executed similar to the one done by task A. In such a case, because of a lack of a mechanism represented by an OS for switching the status of a message communication device or an input/output device, such a device experiences interference between the operation of task A and that of task B, which destroys the consistencies of the respective operations, thus rendering it impossible to obtain correct results of operation.